With the development of microprocessors, the major trend in computer-controlled communications systems has been directed to distributed systems including a central controller including one or more processors and individual module or group controllers each including a microprocessor. For example, see U.S. Pat. No. 4,127,742 issued Nov. 28, 1978 to G. Couturier et al.
In such systems, there may arise situations where more than one controller is attempting to access a particular bus. In most systems, a bus assigner is used to control access to a bus based on preassigned priorities and processors denied access are placed in a hold condition. For example, see U.S. Pat. No. 3,959,775 issued to J. Valassis et al on May 25, 1976.
Alternatively, as noted in the last-named patent, a bus assigner is used to sequentially scan the microprocessors and assign a place in a queue to the processors dependent on the order in which the request is received.
In other systems, the systems controller is given priority access in the even of simultaneous requests and the group processors are placed in a hold condition.